Digital Verification Engineer – UVM/VHDL/Verilog (Remote FR)

European Tech Recruit is seeking an experienced Digital Verification Engineer to join a rapidly expanding semiconductor company in France. This permanent full-time role involves developing verification strategies, building robust testbenches, and collaborating with design and validation teams. Candidates should have 3-8+ years of experience in digital verification, strong knowledge of System Verilog, and familiarity with VHDL or Verilog. Options for on-site work in Paris, Caen, or Grenoble are available, along with remote work considerations.

#J-18808-Ljbffr