ASIC NoC Verification & Solutions Engineer | SoC / ASIC / NoC / UVM / Verification

ASIC NoC Verification & Solutions Engineer | SoC / ASIC / NoC / UVM / Verification

We are currently partnered with a global semiconductor technology company developing highly configurable interconnect hardware IP, software tools, and advanced exploration and verification methodologies for complex SoC environments.

Their technology sits at the heart of modern SoC infrastructure, connecting major IP blocks while enabling engineering teams to achieve the required Power, Performance and Area (PPA) characteristics. As part of their continued technology expansion, they are looking to hire an ASIC / NoC Verification & Solutions Engineer to support the deployment and adoption of NoC verification technology across a diverse portfolio of SoCs spanning mobile, automotive, servers, IoT, connectivity, and other advanced applications.

Key responsibilities

• Collaborate with Architecture, Hardware, Software, Verification, Emulation, and other engineering teams to ensure NoC verification technology is deployed and used effectively
• Contribute to the definition, configuration, and continuous enhancement of NoC verification environments across multiple SoC programmes
• Provide technical support for new NoC verification solutions and their integration into complex ASIC/SoC projects
• Analyse and resolve complex NoC testbench, DUT, and simulation issues
• Debug verification scenarios across simulation, emulation, and silicon bring-up environments
• Investigate the behaviour of verification components, UVM environments, scoreboards, and associated automation tools
• Support verification activities in accordance with current ASIC verification methodologies and industry standards

Key requirements

• Strong experience in ASIC/SoC verification, design, or related semiconductor engineering environments
• Minimum 5 years of solid experience in verification and/or design within the SoC/ASIC development lifecycle
• Strong analytical and debugging skills across simulation, emulation, and/or silicon bring-up environments
• Good understanding of Verilog and SystemVerilog-based verification environments
• Strong understanding of UVM and modern ASIC verification methodologies
• Experience working with verification IPs, testbenches, scoreboards, DUTs, and simulation environments
• Understanding of interconnect protocols and architectures including AHB, AXI, ACE, ACE-Lite, CHI, and NoC concepts
• Understanding of the overall SoC development flow, including SoC architecture, RTL design, verification, performance analysis, DDR memory channels, physical implementation, and silicon debug

Keywords

ASIC Verification / SoC Verification / NoC Verification / Verification Engineer / Solutions Engineer / Solutions Deployment / NoC / Network-on-Chip / Interconnect / Hardware IP / Verification IP / VIP / UVM / Universal Verification Methodology / SystemVerilog / Verilog / RTL / Testbench / Scoreboard / DUT / Simulation / Emulation / Silicon Debug / Post-Silicon / Verification Automation / Python / Linux / Shell / Git / Synopsys / Mentor Graphics / Siemens EDA / AHB / AXI / ACE / ACE-Lite / CHI / Coherency / CPU / GPU / Cache / DDR / Memory Controller / MMU / QoS / Security / SoC Architecture / ASIC / Semiconductor / Microelectronics / Hardware Verification / SoC Integration / Technical Support / Verification Methodology / Debug / PPA / Global Engineering

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