SoC Design Engineer - Intern

SoC Design Engineer Intern – MPU Design Team

As a SoC Design Engineer Intern, you will work with the global Silicon Development Team on design and development of complex SoCs.

Responsibilities

• Learn and understand the current SoC Processor Sub‑System based on ARM cores, including components, testbenches, integration, debug, and TrustZone security features.
• Evaluate a SoC Processor Sub‑System based on RISC‑V for a new generation of products.
• Study the Worldguard security and debug architecture.
• Identify potential functions to be developed in cooperation with our IP team (e.g., firewall) and reusable modules from the existing Microchip RISC‑V platform.
• Perform RTL integration (Verilog/SystemVerilog) and verification with dedicated testbenches (C and SystemVerilog).
• Prepare technical documentation.

Required Qualifications

• Final‑year undergraduate student or Master candidate in Electronics.
• Basic knowledge of CMOS technology and verification of digital circuits.
• Understanding of microcontroller or microprocessor architecture.
• Proficiency in at least one RTL language (VHDL, Verilog, SystemVerilog) and C coding.
• Excellent problem‑solving skills, strong written and verbal communication, and the ability to collaborate across functional groups and organizations.
• Very good knowledge of English.

Preferred Qualifications

• Experience with digital verification tools.
• Experience with scripting languages (csh, tcl, python).
• Hands‑on lab/debug experience in RTL (Verilog, SystemVerilog or VHDL).

Travel: 0% – 25% required.