PhD Position F/M Programming real-time applications on scratchpad-based multicore architectures
Inria, the French national research institute for the digital sciences
Organisation/Company Inria, the French national research institute for the digital sciences Research Field Computer science Researcher Profile First Stage Researcher (R1) Application Deadline 11 Apr 2026 - 00:00 (UTC) Country France Type of Contract Temporary Job Status Full-time Hours Per Week 38.5 Offer Starting Date 1 Oct 2026 Is the job funded through the EU Research Framework Programme? Not funded by a EU programme Reference Number Is the Job related to staff position within a Research Infrastructure? No
Offer Description
The PhD student will be part of the SyCoMoRES team of Inria Lille & CRIStAL lab, which currently hosts 6 fellow PhD students. Lille is a city close to Brussels, Paris & London, easily reachable by train, with a large student population and a number of cultural places & events.
PhD students are appointed for a duration of 3 years. We plan to organize weekly research meetings with the PhD student.
An Embedded Real-Time System (ERTS) controls a physical device in its environment, at a rate adapted to the device and its environment. ERTS can be found in many industrial domains, including automotive, avionics, nuclear plants or automated production lines. They are often of critical nature; a malfunction may damage properties or even put human lives in danger. Developers of ERTS must ensure not only that the system computes correct values, but also computes values at the right time.
Multicore hardware platforms have now become the norm for ERTS, due to their potential for supporting complex applications. The memory hierarchy comprises multiple levels of caches, one or more shared interconnects, and a central shared random-access memory (DRAM). Tasks running on different cores may simultaneously access shared components of the memory hierarchy, causing contention and interference that can delay their execution. As a consequence, performing a timing analysis on such a platform is a difficult problem, because this requires to finely analyse the evolution of the cache content, the scheduling of tasks, and the contention resolution mechanisms.
A scratchpad memory is a local, directly addressable fast memory whose content is explicitly managed by the programmer. Scratchpads are an attractive alternative to caches for ERTS, because they provide better control over when memory transfers occur, thus simplifying timing analysis. However, this requires to manage memory transfers directly in software, which can be tedious and error‑prone for large scale applications.
The objective of the thesis is to contribute to a framework for the development of ERTS on multicore hardware architecture where core‑local memories are scratchpad memories. Our goal is to automatize memory allocation and data‑transfers between the different memory subsystems, so as to ease the development of ERTS on such platforms.
First, we would like to design an Application Programming Interface (API) at the Operating System level, consisting of simple primitives that abstract the underlying platform. This could for instance consist in extending an existing Real‑Time Operating System, such as FreeRTOS for instance.
Second, we would like to explore the compilation of ERTS for such a hardware platform. The system will be programmed with a high‑level data‑flow language, such as Prelude for instance, which was specifically designed for the development of critical ERTS. The compiler will automatically generate the allocation of code and data in the different memory subsystems, as well as the memory transfer instructions.
The following activities will be carried out during the thesis:
- Bibliographic research
- Proposing solutions for the identified research directions
- Writing research papers on the thesis results
Technical skills: a good background on computer science and embedded systems.
Languages: English. French is not required.
Other valued, appreciated: compilation, real‑time systems, hardware architecture.
Specific Requirements
- Enjoying intellectual stimulation and facing new challenges
Languages FRENCH Level Basic
Languages ENGLISH Level Good
Additional Information
- Partial reimbursement of public transport costs
- Leave: 7 weeks of annual leave + 10 extra days off due to RTT (statutory reduction in working hours) + possibility of exceptional leave (sick children, moving home, etc.)
- Possibility of teleworking and flexible organization of working hours
- Professional equipment available (videoconferencing, loan of computer equipment, etc.)
- Social, cultural and sports events and activities