MEMS - Digital Verification - SR

YOUR ROLE

The position is aimed at a Digital Verification Engineer with prior experience in digital verification of ASIC.

The candidate will join the digital verification team of MEMS GROUP and will see the ASIC verification process from specification definition up to final product industrialization.

The position is open on Toulouse (France) sites and is looking for senior profiles (3 to 5 years of experience).

Responsibilities

• Definition and development of verification testbench.
• Development of verification components, DSP models and digital control logic.
• Test case development for simulation and creation of simulation cases for various scenarios.
• Debugging failures and creating simulation cases for multiple scenarios.

Qualifications

• Background in digital verification testbench (Universal Verification Methodology and System Verilog).
• Knowledge of System Verilog Assertions, coverage, self‑checking capabilities, testbench automation, bug analysis and reporting.
• Basic knowledge of Python and TCL scripts, version control system.
• Knowledge of formal verification and communication protocols (I2C, SPI and I3C) considered an advantage.
• Good communication skills, fluent in English, ability to work in a team and collaborate across the entire MEMSs GROUP Design team.

DEI Statement

ST is committed to fostering a diverse and inclusive workplace. We do not tolerate discrimination and strive for equity in career development, opportunities and remuneration. Candidates who may not meet every single requirement are encouraged to apply.