Junior ASIC/FPGA Design Engineer – SoC & eFPGA, France

Intellectual Capital Resources Ltd in Sophia Antipolis, France, is seeking a Junior ASIC Design Engineer to contribute to innovative embedded FPGA (eFPGA) technology and full‑lifecycle digital design.

You will work on RTL/SoC design, verify modules, and collaborate with experienced engineers across disciplines while gaining hands-on experience and taking ownership early in a growing semiconductor team near the Mediterranean coast.