ASIC HW Architect

Working for a cutting-edge semiconductor company, I am looking to recruit an ASIC Hardware Architect for fascinating and brand-new project work.

The position is available for engineers / applicants who can demonstrate experience of full chip design, (plus understanding / experience of) architecture and delivery (to tape-out).

Specialist IP and/or sub-system knowledge is required.

You will be tasked with initial phase definition of requirements, high-level architecture and then high level design / design specification.

Salary available is dependent on years of experience - circa €90-110k.

Key skills / requirements:

• BSc / MSc / PhD in Micro-electronics, physics, or similar filed
• 10-15+ years' experience in ASIC IP Hardware architecture / SOC architecture, and/or a good background in digital IC design
• Knowledge of complex chips - incorporating CPU / GPU / similarly complex processors.
• Deep understanding of MCUs Subsystems, Memory Controllers, and memory architectures (e.g., SRAM, ROM, eFuse).
• Extensive experience with the Digital ASIC Flow, RTL design, and Debug methodologies (e.g., DFT, JTAG, Scan, BIST).
• Knowledge of SOC architecture, set-up / silicon bring-up, validation and all it's associated processes.
• SOC design, system design, system architecture
• IP selection & top level integration
• SOC performance & modelling e.g. UML
• SOC interconnect protocols - AXI, AMBA, AHB, APB, OCP, STBus, DTL
• DSP / signal processing / communication protocols
• Digital-AMS chip development - digital to analog interfaces
• low-power, performance and optimisation
• low level software, firmware and embedded requirements - drivers, controllers etc.