3D Integration Engineer H/F

Alice & Bob is developing the first universal, fault-tolerant quantum computer to solve the world’s hardest problems.

The quantum computer we envision building is based on a new kind of superconducting qubit: the Schrödinger cat qubit . In comparison to other superconducting platforms, cat qubits have the astonishing ability to implement quantum error correction autonomously!

We're a diverse team of 250+ brilliant minds from over 35 countries united by a single goal: to revolutionise computing with a practical fault-tolerant quantum machine. Are you ready to take on unprecedented challenges and contribute to revolutionising technology? Join us, and let's shape the future of quantum computing together!

Alice & Bob is developing the first universal, fault-tolerant quantum computer to solve the world’s hardest problems.

The quantum computer we envision building is based on a new kind of superconducting qubit: the Schrödinger cat qubit . In comparison to other superconducting platforms, cat qubits have the astonishing ability to implement quantum error correction autonomously!

We're a diverse team of 250+ brilliant minds from over 35 countries united by a single goal: to revolutionise computing with a practical fault-tolerant quantum machine. Are you ready to take on unprecedented challenges and contribute to revolutionising technology? Join us, and let's shape the future of quantum computing together!

We are seeking a Senior 3D Integration Engineer H/F to join the Process Integration team within the Quantum Hardware & Infrastructure department.

This position sits at the intersection of nanofabrication, assembly and scalable QPU design, working closely with teams across the hardware organization — from roadmap to fabrication, packaging, and validation.

Responsabilities

• Identify and benchmark enabling 3D assembly technologies for QPUs in accordance with superconducting-circuit constraints: material/process compatibility, microwave performance, and cryogenic reliability
• Develop and qualify the 3D integration building blocks — airbridges, flip-chip bonding, TSV, multi-layer wiring (MLW), superconducting interconnects, and wafer-level assembly — in close collaboration with fabrication and packaging teams
• Develop and coordinate integration test plans in collaboration with cross-functional teams
• Establish scalable, well-documented integration procedures to support system growth
• Investigate and resolve integration issues and technical anomalies, ensuring alignment with specifications and overall performance targets
• Act as the technical point of contact for 3D integration with external foundries, packaging partners, and equipment vendors, in close collaboration with our foundry partnerships expert

Requirements

• PhD or MSc in physics, materials science, electrical engineering, or microelectronics, with strong hands-on cleanroom experience
• 3+ years of demonstrated 3D integration experience, in flip-chip / bump bonding and TSV processing.
• Proven track record of developing and qualifying an integration process brick end to end — from literature survey and test-vehicle design through experiments, data analysis, and go/no-go decision
• Solid grounding in failure analysis and reliability assessment of 3D interconnects: cross-sectioning, SEM, X-ray inspection / tomography, profilometry, electrical test structures
• Understanding of superconducting QPU fabrication and of what cryogenic operation demands from materials and interfaces is a plus

Recruitment process

• Screening Call with Alexandra Talent Acquisition Specialist (30 min)
• Hiring Manager Interview with the Hiring Manager (45 min)
• Technical Interview/Presentation with the Team (90 min)
• Leadership and Fit Interview (60 min)

Benefits:

• - Our success is your success: own it with our BSPCEplan
• - Direct IP Compensation:Earn substantial bonuses for driving the core patents that define our quantum architecture.
• - Flexibleremotepolicy, up to 40 % a month
• - A PArental planincluding additional benefits such as crèche support or additional days-off to take care of under 12 years old children
• - Subsidized membership with Urban Sports Club
• - Mental healthsupport withmoka.care
• - 25-day vacation policy (as per French law) + RTT
• - Half of transportation cost coverage (as per French law), or yearly allowance for the die-hard bicycle users
• - Competitive health coverage, with Alan.
• - Meal vouchers with Swile, as well as access to a fully equipped and regularly stocked kitchen
• - French language courses covered by the company for those interested

Research shows that women might feel hesitant to apply for this job if they don't match 100% of the job requirements listed. This list is a guide, and we'd love to receive your application even if you think you're only a partial match. We are looking to build teams that innovate, not just tick boxes on a job spec.

You will join of one of the most innovative startups in France at an early stage, to be part of a passionate and friendly team on its mission to build the first universal quantum computer!

We love to share and learn from one another, so you will be certain to innovate, develop new ideas, and have the space to grow.

QUANTUM ROLE CONTEXT | Appended by Quantum.Jobs v2

Role context:

This role exists to connect advanced microfabrication, microelectronics assembly, and chip architecture within hardware development workflows. Positioned between chip design, packaging, and cleanroom fabrication teams, the position provides specialized technical processes for multi-layer microfabricated assemblies. Engineers in this domain develop physical interconnect structures and integration procedures to enable high-density component layout. By establishing reliable vertical and lateral interconnect interfaces, this function allows complex microfabricated systems to expand physical scale and component density while satisfying tight physical, thermal, and electrical performance constraints.

Quantum ecosystem relevance:

The role supports the quantum computing ecosystem by developing physical interconnects and packaging building blocks necessary to scale quantum processing hardware. As quantum hardware transitions toward higher qubit counts, physical routing constraints require advanced three-dimensional microfabrication methods to connect control lines without degrading qubit coherence. Operating at the hardware infrastructure layer, this engineering function bridges foundational semiconductor manufacturing processes with specialized cryogenic hardware demands, ensuring that multi-layer processing architectures maintain interface stability and material compatibility in quantum hardware environments.

Capability signals:

• - Advanced cleanroom experience in microelectronics assembly and advanced packaging development
• - Proficiency in developing flip-chip bonding and vertical interconnect process steps
• - Expertise in failure analysis and structural characterization of multi-layer interconnects
• - Knowledge of material compatibility and interface constraints in specialized physical environments
• - Technical coordination with external semiconductor foundries and specialized packaging vendors